This invention relates to noise generators and, more particularly, to an apparatus and method for generating pseudo-random parallel bits and for utilizing the generated bits to obtain Gaussian distributed noise and Poisson distributed noise.
Electronic noise generators have become increasingly important for generating noise that is used for various purposes, for example testing and calibration of electronic equipment, simulations, and electronic games. In testing modern electronic equipment, it is desirable to have a capability of generating noise which has a relatively wide bandwidth, has statistical properties which fall within defined limits, and is still not unduly complex or expensive. It is also desirable that the noise be repeatable and reproducible so that uniformity of test results can be expected.
Digital noise generators generally have inherent repeatability and stability. The generated digital noise may be either used directly or converted to analog noise. The bandwidth of digital noise is a function of a basic clock in the digital noise generator. The cost, complexity, and usable type of logic circuitry are often determined by the selected basic clock frequency.
A useful element of prior art digital noise generators is the so-called "pseudo-random sequence generator" or "PRSG". A pseudo-random sequence has certain properties which are similar to purely random sequences, these properties rendering pseudo-random sequences of bits (typically binary bits) quite useful. (See, for example, Golomb et al. Digital Communications With Space Applications, Prentice-Hall, Inc., 1974.) A typical prior art PRSG employs a string of shift register elements or stages, and the modulo-2 sum of the outputs of the last stage and of a proper choice of one or more other stages is fed back to the first stage of the string. If the shift register has x stages, a sequence of 2.sup.x -1 pseudo-random bits can be generated, with the output being taken at any convenient place; e.g. the output of one of the register stages. The shift register stages are shifted using a clock and, at each clock pulse, a new pseudo-random bit of the sequence is generated at the output.
The PRSG is a useful device, but there are applications where it is necessary to have, at each specified time period, a plurality of digital bits upon which to operate. For example, it is known that a signal which has a substantially Gaussian distribution with time can be generated by summing a plurality (preferably a relatively large number) of random binary bits. This means that a number of bits must be available at each specified time period to obtain an independent sum. Accordingly, if one were to utilize the single bit output of a PRSG to obtain a Gaussian-distributed noise signal in this manner, the bits generated during a plurality of successive clock pulses would be needed to obtain each sum. This results in rendering the effective noise generator clock rate (and bandwidth) a fraction of the original basic PRSG clock rate.
In the U.S. Pat. No. 3,885,139 there is disclosed a pseudo-Gaussian noise generator which includes a plurality of multistage binary shift registers, the input to each register being the modulo-2 sum of the output of two stages from different register. Using this type of technique, a number of bits, for example the outputs of each of the registers, are available at each clock pulse. These outputs are summed to obtain the pseudo-Gaussian signal.
The referenced Patent 3,885,139 succeeds in generating a number of bits at each clock pulse but, in maintaining system bandwidth, the technique disclosed therein may sacrifice power spectral density and, to some degree, the statistical integrity of the Gaussian distribution which is desired to be produced. In particular, the referenced patent indicates that the bits obtained at each clock pulse are not consecutive bits from a pseudo-noise sequence, but rather are bits from several phase shifts of the sequence. A problem with this approach is that there is no guarantee that consecutive sums will be independent since the spacing of the sequence phase shifts from which the bits are drawn is indeterminite and thus not controllable. In other words, there is no guarantee of even a small sequence of totally uncorrelated groups, and a vanishingly small probability of getting the maximum number of totally uncorrelated groups. It is recognized that the use of bits from several phase shifts of a sequence could theoretically lead to a maximum length sequence of groups but, in practical situations, the probability is relatively small that the selected phase shifts will result in a maximum length sequence of groups. Thus, the input bits which should ideally be "random" over some desired period may actually have a degree of time correlation during that period. This is undesirable since uncorrelated input bits are necessary for both statistical and spectral integrity.
It is one of the objects of the present invention to provide a novel pseudo-random bit generator which can produce, at each clock pulse, a plurality of parallel bits which are successive bits from the same pseudo-random sequence, thereby insuring achievement of a maximum number of totally uncorrelated groups. Using this bit generator, the invention can generate noise having a binomial distribution and a (sin x).sup.2 /x power spectral density. A further object of the invention is to provide a digital noise generator which produces Poisson or random distributed noise, and can also produce mutually uncorrelated combinations of random impulse and white noise, for example random bursts of white noise of random duration.